`qlal4s3b_cell_macro' does not have a port named 'Sys_Clk0'
Posted: Thu Oct 14, 2021 8:12 am
Hi,
I'm trying to evaluate the EOS3 chip using Quickfather board and qorc sdk.
I've installed Sybmiflow, using the install script. I've enabled conda environment.
I can make the hellowordsw project without issues.
But when trying to make the hellowordhw project, that use Symbiflow to synthesize the FPGA part, I got this error:
As I've read, the Sys_Clk0 port has been added in last versions of the techlib. But I don't know how to get last version (was expected it was install with Symbiflow) or how to tell the synthesizer to use the correct lib that could be somewhere into the SDK.
Thanks for your help
Cyril
I'm trying to evaluate the EOS3 chip using Quickfather board and qorc sdk.
I've installed Sybmiflow, using the install script. I've enabled conda environment.
I can make the hellowordsw project without issues.
But when trying to make the hellowordhw project, that use Symbiflow to synthesize the FPGA part, I got this error:
Code: Select all
ERROR: Module `qlal4s3b_cell_macro' referenced in module `helloworldfpga' in cell `u_qlal4s3b_cell_macro' does not have a port named 'Sys_Clk0'.
Thanks for your help
Cyril