`qlal4s3b_cell_macro' does not have a port named 'Sys_Clk0'

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CyrilB
Posts: 3
Joined: Tue Oct 12, 2021 12:00 pm

Hi,
I'm trying to evaluate the EOS3 chip using Quickfather board and qorc sdk.
I've installed Sybmiflow, using the install script. I've enabled conda environment.
I can make the hellowordsw project without issues.
But when trying to make the hellowordhw project, that use Symbiflow to synthesize the FPGA part, I got this error:

Code: Select all

ERROR: Module `qlal4s3b_cell_macro' referenced in module `helloworldfpga' in cell `u_qlal4s3b_cell_macro' does not have a port named 'Sys_Clk0'.
As I've read, the Sys_Clk0 port has been added in last versions of the techlib. But I don't know how to get last version (was expected it was install with Symbiflow) or how to tell the synthesizer to use the correct lib that could be somewhere into the SDK.

Thanks for your help
Cyril
ale@quicklogic.com
Posts: 3
Joined: Wed Jun 03, 2020 4:47 am

For Symbiflow v1.3.1: the port names are: Sys_Clk0, Sys_Clk0_Rst, Sys_Clk1, Sys_Clk1_Rst
For Symbiflow v1.3.2: the port names are: C16_Clk, C16_Clk_Rst, C21_Clk, C21_Clk_Rst

The reason for names change is to match with datasheet.
CyrilB
Posts: 3
Joined: Tue Oct 12, 2021 12:00 pm

Thank you.

The right names for port are: Clk_C16...

Cyril
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