UART DMA support

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btashton
Posts: 14
Joined: Thu Jul 02, 2020 6:34 am

The platform datasheet makes reference to supporting DMA for the UART peripheral, but the Reference Manual does not contain any information on this. Additionally the HAL defines some registers for the UART around this, but that is all. One of the reasons that I would like to use DMA is the UART does not have the usual interrupt for the TX FIFO being empty, only when it is full, this makes it a lot harder to wake up a thread to move pending data into the FIFO.

Section 2.8.3 UART
https://www.quicklogic.com/wp-content/u ... t_v1.1.pdf

HAL reference to UART DMA CTRL register
https://github.com/QuickLogic-Corp/qorc ... ev.h#L1310
gmartin
Posts: 17
Joined: Thu May 14, 2020 2:50 am

Unfortunately the S3 does not support SDMA to/from the UART. -- From the Platform Datasheet
The blocks that can initiate transfer using SDMA are:
1. I2S slave port
2. M4F processor
3. FFE
4. On-chip programmable logic

The FIFO transmit interrupt can be programmed to <= 1/8 full in the Interrupt FIFO Select Register (0x4001_0034). Would that meet you needs in the absence of SDMA capability?

The existence of the defined bits in the eoss3_dev.h file as you pointed is a unfortunate leftover and should not be present
btashton
Posts: 14
Joined: Thu Jul 02, 2020 6:34 am

Unfortunately not, I need that <= pointing the other way. The OS is streaming data into the FIFO faster than it leaves, so say I am writing 100 bytes and I fill the FIFO, I need to block the service routine until there is room again, as far as I can tell this is not possible via the supplied interrupts since they only let me know when I am running out of room in the FIFO. To get around it for now I am not using the interrupt on TX and instead yielding the thread with a timed semaphore based on the baud rate if there is pending data to be loaded.

Is the S3AI different? The platform datasheet I linked for that is where I was turned on to the UART DMA as well as the test registers in the Reference Manual for the S3.
2.8.3Universal Asynchronous Receiver Transmitter (UART)
The UART provides a serial data connection that can be used for communications and trace. The main features of UARTinclude:
•Programmable use as UART or IrDA SIR input/output•Separate 32×8 transmit and 32×12 receive FIFO memory buffers to reduce CPUinterrupts
•Programmable FIFO disabling for 1-byte depth
•Programmable baud rate generator
•Standard asynchronous communicationbits (start, stop and parity)
•Independent masking of transmit FIFO, receive FIFO, receive timeout, modem status,and error condition interrupts
•Supportfor Direct Memory Access (DMA)
Thanks for the clarification, I know the documentation is rather new, so I hope my feedback is also helpful as I work through my porting efforts outside of the SDK.
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