We were hoping to use a 32KHz crystal as a clock source for the board, along with the alternate pin assignments for SWD. In the TRM r1.01a, tables 30-4 and figure 30-1 seemed to imply that this was possible, by bootstrapping with IO_8 pulled up, and IO_9 pulled down. Additionally, the wording in section 10.2.1 seems to imply that this would be the case. However in the datasheet (Version 3.3d), table 25 says that in this configuration, a crystal is not available as a clock source.
When testing with our hardware in the seemingly invalid configuration, the JTAG interface appears to work as expected, however the system clock drifts into and out of stability. Presumably the internal feedback loop for the crystal is being disabled in this mode.
Is it possible to make this work, perhaps by having the firmware reassign the SWD pins during boot, or by using the SWD interface to reconfigure the RTC for use with a crystal oscillator? The documentation seems to be clear that the SWD pins are latched and unchangeable after bootstrap, but the RTC documentation is more vague.