We were hoping to use a 32KHz crystal as a clock source for the board, along with the alternate pin assignments for SWD. In the TRM r1.01a, tables 30-4 and figure 30-1 seemed to imply that this was possible, by bootstrapping with IO_8 pulled up, and IO_9 pulled down. Additionally, the wording in sec...

Thanks! I increased the value of C5 to 4.7uF, and it's stretched the rise time on the reset pin far enough to allow it to boot: QL_EOS_S3 boot success with 4.7uF cap.png That should be good enough for a dev board. Out of curiosity, is there a more 'production ready' reference design available for th...

I'm developing a barebones breakout board for the EOS-S3, and have run into a snag with the device behavior at power-on. I implemented a minimal design based on the QuickFeather dev board, and my schematic is here: https://github.com/Blinkinlabs/QL-EOS-S3-breakout/raw/main/releases/2020-10-09_ql-eos...

Another way to un-brick a board is to use a separate device to program the boot image into the SPI flash directly. Here's a python script that can be used to generate a suitable flash image: https://github.com/Blinkinlabs/bl_apps/blob/main/tools/build_flash_image.py Once you have the image, you can ...