Search found 14 matches

by btashton
Wed Jan 13, 2021 4:03 pm
Forum: EOS-S3
Topic: I2C Master Registers
Replies: 15
Views: 2352

Re: I2C Master Registers

Thanks I will look, I have been meaning to circle back to add more support in Apache NuttX now that things have settled a but more.
by btashton
Tue Jul 28, 2020 7:36 pm
Forum: EOS-S3
Topic: I2C Master Registers
Replies: 15
Views: 2352

Re: I2C Master Registers

@anthony-ql Is there anything you can share on this? Thanks.
by btashton
Thu Jul 23, 2020 4:37 pm
Forum: EOS-S3
Topic: I2C Master Registers
Replies: 15
Views: 2352

Re: I2C Master Registers

Yes, I cannot seem to get any communication to start on the wishbone bus, so any example that you have would be much appreciated. I am likely giving a talk on this platform at our NuttX workshop in a couple weeks and would really like to demonstrate some of these features.
by btashton
Sat Jul 18, 2020 9:37 pm
Forum: EOS-S3
Topic: I2C Master Registers
Replies: 15
Views: 2352

Re: I2C Master Registers

This is fairly close to what I already have, but there are a couple differences: * The pre-scaler and configuration registers are not being written to, so I don't see how this would actually write * There is no check between the two writes to the bus. This is where I am running into trouble. I write...
by btashton
Wed Jul 15, 2020 4:40 pm
Forum: EOS-S3
Topic: I2C Master Registers
Replies: 15
Views: 2352

Re: I2C Master Registers

Yes I am still having issues with the wishbone access. For some context I am adding support to the Apache NuttX RTOS (which just got initial support merged in today), so none of the code I am working with uses the HAL, I have just been referring to it when I hit confusion with the documentation. My ...
by btashton
Tue Jul 14, 2020 9:27 am
Forum: EOS-S3
Topic: I2C Master Registers
Replies: 15
Views: 2352

Re: I2C Master Registers

I am running into some issues communicating on the wishbone bus. After I start the first transfer the wb_ms_start bit in the CSR register (0x008) never goes low (busy is low) I have verified that the FFE X1 and X4 clocks are correct via the debug pad mux interface and bringing them out to a pad. One...
by btashton
Mon Jul 13, 2020 11:14 pm
Forum: EOS-S3
Topic: I2C Master Registers
Replies: 15
Views: 2352

Re: I2C Master Registers

This is great Greg. Thanks for the detailed docs, I'll see how far I get this week.
by btashton
Sun Jul 12, 2020 7:21 pm
Forum: EOS-S3
Topic: I2C Master Registers
Replies: 15
Views: 2352

Re: I2C Master Registers

Thank you Greg I appreciate it. Also I want to eventually support more of the low power operation of this chip, but while Section 32 speaks in great detail to the theory of operation for the Power System and refers to registers, I could not find a register map for this system.
by btashton
Sun Jul 12, 2020 7:40 am
Forum: EOS-S3
Topic: I2C Master Registers
Replies: 15
Views: 2352

I2C Master Registers

I have been digging through the Reference Manual and the Datasheet for this but all I have found are the EXT_FFE_CTRL registers for interacting with the wishbone bus. For SPI Master the wishbone registers are defined, but I could find no such documentation for the I2C interface. Once again the HAL h...
by btashton
Thu Jul 09, 2020 5:28 am
Forum: General Discussion
Topic: EOS S3 Interrupt Numbers
Replies: 10
Views: 1808

Re: EOS S3 Interrupt Numbers

Really appreciate it, this is the information I was looking for.