Search found 49 matches

by anthony-ql
Mon Mar 22, 2021 3:45 pm
Forum: EOS-S3
Topic: PCB land pattern guidance for EOS S3 PD64 packaging?
Replies: 2
Views: 51

Re: PCB land pattern guidance for EOS S3 PD64 packaging?

We do have a layout for the BGA64 package. Can you view Allegro layout file? You can download the free Physical Viewer tool. Let me know.
by anthony-ql
Mon Mar 22, 2021 3:38 pm
Forum: QuickFeather
Topic: Connection problems.
Replies: 12
Views: 189

Re: Connection problems.

Check out this thread, viewtopic.php?f=9&t=105
by anthony-ql
Mon Mar 22, 2021 3:33 pm
Forum: QuickFeather
Topic: Wishbone Bus
Replies: 1
Views: 55

Re: Wishbone Bus

Please see the the Wed Mar 10th Webinar for information on M4 and AHB Lite interface, https://sensiml.com/blog/tutorial-series/. Hope this helps.
by anthony-ql
Mon Mar 22, 2021 3:26 pm
Forum: QuickFeather
Topic: Connection problems.
Replies: 12
Views: 189

Re: Connection problems.

Please review this thread and see if it will help you, viewtopic.php?f=9&t=99
by anthony-ql
Mon Mar 15, 2021 2:53 pm
Forum: QuickFeather
Topic: TinyFPGAProgammer Flash issue on Quickfeather
Replies: 2
Views: 86

Re: TinyFPGAProgammer Flash issue on Quickfeather

Will pass your issue to internal team.
by anthony-ql
Mon Mar 15, 2021 2:50 pm
Forum: QuickFeather
Topic: The LED of QF stays solid green in download mode
Replies: 5
Views: 178

Re: The LED of QF stays solid green in download mode

I am glad that the demo works for you.
by anthony-ql
Wed Mar 03, 2021 3:34 pm
Forum: SymbiFlow
Topic: Install SymbiFlow on Mac OS
Replies: 3
Views: 191

Re: Install SymbiFlow on Mac OS

See your request; have passed it along to someone with MAC experience.
by anthony-ql
Tue Mar 02, 2021 4:38 pm
Forum: EOS-S3
Topic: eFPGA access to Voice subsystem data
Replies: 2
Views: 131

Re: eFPGA access to Voice subsystem data

This topic is complicated and we have plan to cover in future webinars. In short, the audio data is stored in a circular buffer made of M4 SRAM (part of 512KB SRAM). The audio block's 16-bit PCM data can be sent to eFPGA using System DMA (SDMA). you will need to design an IP in eFPGA to accept the d...